Thorsten Froehlich <tho### [at] trfde> wrote:
: However, it should be noted that even DDR-SDRAM still has a
: specific access time for the first access which isn't much better than the
: first access time of SDR-SDRAM (because decoding an address takes about the
: same in either type of RAM).  So again you gain quite a bit from large
: caches...

  On the other hand, when there's a cache miss, significant amount of time is
spent copying a portion of the RAM to the cache. If the RAM is faster, wouldn't
this copying be faster as well?

-- 
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[1rgb 9]}scale<D,D*3D>*1e3}rotate y*A*8}#end M(-3<1.206434.28623>70,7)M(
-1<.7438.1795>1,20)M(1<.77595.13699>30,20)M(3<.75923.07145>80,99)// - Warp -

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